R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 156

MCU 1KB FLASH 32K ROM 36-QFN

R5F213J6CNNP#U0

Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet

Specifications of R5F213J6CNNP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F213J6CNNP#U0R5F213J6CNNP
Manufacturer:
RENESAS
Quantity:
1 000
Company:
Part Number:
R5F213J6CNNP#U0R5F213J6CNNP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
R5F213J6CNNP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
9.7.1.1
9.7.1.2
9.7.1.3
9.7.1.4
The XIN clock divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock. If the CM14 bit is set to 0
(low-speed on-chip oscillator on) or the FRA00 bit in the FRA0 register is set to 1 (high-speed on-chip
oscillator on), fOCO can be used for timer RA.
Also, if the FRA00 bit is set to 1, fOCO40M can be used for timer RC and timer RD.
If the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the voltage detection
circuit.
The XCIN clock divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock.
In this mode, low consumption operation is enabled by stopping the XIN clock and the high-speed on-chip
oscillator, and by setting the FMR27 bit in the FMR2 register to 1 (low-current-consumption read mode
enabled). When the CPU clock is set to the XCIN clock divided by 1 (no division), 2, 4, or 8, low-current-
consumption read mode can be used. However, do not use low-current-consumption read mode when the
frequency of the selected CPU clock is 3 kHz or below. After setting the divide ratio of the CPU clock, set the
FMR27 bit to 1.
Also, if the FRA00 bit is set to 1, fOCO40M can be used for timer RC and timer RD.
If the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the voltage detection
circuit.
To enter wait mode from low-speed clock mode, lower consumption current in wait mode is enabled by setting
the VCA20 bit in the VCA2 register to 1 (internal power low consumption enabled).
To reduce the power consumption, refer to 32. Reducing Power Consumption.
The high-speed on-chip oscillator is used as the on-chip oscillator clock when the FRA00 bit in the FRA0
register is set to 1 (high-speed on-chip oscillator on) and the FRA01 bit in the FRA0 register is set to 1. The on-
chip oscillator divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock. If the FRA00 bit is set to 1,
fOCO40M can be used for timer RC and timer RD.
Also, if the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the voltage detection
circuit.
If the CM14 bit in the CM1 register is set to 0 (low-speed on-chip oscillator on) and the FRA01 bit in the FRA0
register is set to 0, the low-speed on-chip oscillator is used as the on-chip oscillator clock. At this time, the on-
chip oscillator clock divided by 1 (no division), 2, 4, 8 or 16 is used as the CPU clock. The on-chip oscillator
clock is also the clock source for the peripheral function clocks. If the FRA00 bit is set to 1, fOCO40M can be
used for timer RC and timer RD.
Also, if the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the voltage detection
circuit.
In this mode, low consumption operation is enabled by stopping the XIN clock and the high-speed on-chip
oscillator, and by setting the FMR27 bit in the FMR2 register to 1 (low-current-consumption read mode
enabled). When the CPU clock is set to the low-speed on-chip oscillator clock divided by 4, 8, or 16, low-
consumption-current read mode can be used. After setting the divide ratio of the CPU clock, set the FMR27 bit
to 1.
To enter wait mode from low-speed clock mode, lower consumption current in wait mode is enabled by setting
the VCA20 bit in the VCA2 register to 1 (internal power low consumption enabled).
To reduce the power consumption, refer to 32. Reducing Power Consumption.
High-Speed Clock Mode
Low-Speed Clock Mode
High-Speed On-Chip Oscillator Mode
Low-Speed On-Chip Oscillator Mode
9. Clock Generation Circuit
Page 125 of 715

Related parts for R5F213J6CNNP#U0