HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 153
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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Conditional Operations and Data Transfer: Some instructions belonging to this class can be
executed conditionally, as described earlier. The specified condition is valid only for the B field of
the instruction, and is not valid for data transfer instructions for which a parallel specification is
made. Examples are shown in figure 2.17.
Assignment of NOPX and NOPY Instruction Codes: When there is no data transfer instruction
to be parallel-processed simultaneously with a DSP operation instruction, an NOPX or NOPY
instruction can be written as the data transfer instruction, or the instruction can be omitted. The
instruction code is the same whether an NOPX or NOPY instruction is written or the instruction is
omitted. Examples of NOPX and NOPY instruction codes are shown in table 2.34.
Figure 2.17 Examples of Conditional Operations and Data Transfer Instructions
DCT PADD X0,Y0,A0
When condition is True
Before execution:
After execution:
When condition is False
Before execution:
After execution:
X0=H'33333333, Y0=H'55555555, A0=H'123456789A,
R4=H'00008000, R6=H'00008233, R9=H'00000004
(R4)=H'1111, (R6)=H'2222
X0=H'11110000, Y0=H'55555555, A0=H'0088888888,
R4=H'00008002, R6=H'00008237, R9=H'00000004
(R4)=H'1111, (R6)=H'3456
X0=H'33333333, Y0=H'55555555, A0=H'123456789A,
R4=H'00008000, R6=H'00008233, R9=H'00000004
(R4)=H'1111, (R6)=H'2222
X0=H'11110000, Y0=H'55555555, A0=H'123456789A,
R4=H'00008002, R6=H'00008237, R9=H'00000004
(R4)=H'1111, (R6)=H'3456
MOVX.W @R4+,X0
MOVY.W A0,@R6+R9 ;
Rev.6.00 Mar. 27, 2009 Page 95 of 1036
REJ09B0254-0600
Section 2 CPU
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