HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 505

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

15.2.2
The timer control registers (TCR) are 16-bit read/write registers that control the timer counters
(TCNT) and interrupts. The TMU has a total of three TCR registers, one for each channel.
The TCR registers control the interrupt generated when the flag that indicates the timer counter
(TCNT) underflow has been set to 1, and select the counter clock. When an external clock has
been selected, the clock edge can also be selected.
TCR is initialized to H'0000 by a power-on reset or manual reset. In standby mode, it is not
initialized and retains the value.
Bits 15 to 9, 7, 6, 4, and 3—Reserved: These bits are always read as 0 and should only be written
with 0.
Bit 8—Underflow Flag (UNF): This is a status flag that indicates that TCNT underflowed.
Bit 8: UNF
0
1
Note: * When a write of 1 is provided to UNF, it is not modified and the previous value is retained.
Initial value:
Initial value:
Timer Control Register (TCR)
R/W:
R/W:
Bit:
Bit:
Description
TCNT has not underflowed.
Clear condition: When 0 is written to UNF
TCNT has underflowed (H'00000000 → H'FFFFFFFF).
Setting condition: When TCNT underflows*
15
—
—
R
R
0
7
0
14
—
—
R
R
0
6
0
UNIE
R/W
13
—
R
0
5
0
12
—
—
R
R
0
4
0
Rev.6.00 Mar. 27, 2009 Page 447 of 1036
11
—
—
R
R
0
3
0
TPSC2
R/W
10
—
R
Section 15 Timer (TMU)
0
2
0
REJ09B0254-0600
TPSC1
R/W
—
R
9
0
1
0
(Initial value)
TPSC0
UNF
R/W
R/W
8
0
0
0