HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 783

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
24.1
The USB Host Controller module incorporated in SH7727 supports Open Host Controller (Open
HCI) Specification for the Universal Serial Bus (USB) as well as the Universal Serial Bus
specification ver.1.1.
The Open HCI Specification for the USB is a register-level description of Host Controller for the
USB which in turn is described by the USB specification.
It is necessary to refer Open HCI specification to develop drivers for this USB Host Controller and
hardware. Also refer to the restrictions on the use of the module listed at the end of this section.
24.1.1
• Support open HCI standard ver.1.0 register set
• Support Universal Serial Bus standard ver.1.1
• Root Hub function
• Support Full speed (12Mbps) mode and Low speed (1.5Mbps) mode
• Support Overcurrent detection
• Support 127 endpoints control in maximum
• The whole area of the synchronous DRAM in area 3 connected to the CPU can be used for
transfer data and descriptor.
General Description
Features
Section 24 USB HOST Module
Rev.6.00 Mar. 27, 2009 Page 725 of 1036
Section 24 USB HOST Module
REJ09B0254-0600

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