HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 247
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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Bit 4—IRQ4 Interrupt Request (IRQ4R): Indicates whether an interrupt request is input to the
IRQ4 pin. When edge detection mode is set for IRQ4, an interrupt request is cleared by clearing
the IRQ4R bit.
Bit 4: IRQ4R
0
1
Bit 3—IRQ3 Interrupt Request (IRQ3R): Indicates whether an interrupt request is input to the
IRQ3 pin. When edge detection mode is set for IRQ3, an interrupt request is cleared by clearing
the IRQ3R bit.
Bit 3: IRQ3R
0
1
Bit 2—IRQ2 Interrupt Request (IRQ2R): Indicates whether an interrupt request is input to the
IRQ2 pin. When edge detection mode is set for IRQ2, an interrupt request is cleared by clearing
the IRQ2R bit.
Bit 2: IRQ2R
0
1
Bit 1—IRQ1 Interrupt Request (IRQ1R): Indicates whether an interrupt request is input to the
IRQ1 pin. When edge detection mode is set for IRQ1, an interrupt request is cleared by clearing
the IRQ1R bit.
Bit 1: IRQ1R
0
1
Bit 0—IRQ0 Interrupt Request (IRQ0R): Indicates whether an interrupt request is input to the
IRQ0 pin. When edge detection mode is set for IRQ0, an interrupt request is cleared by clearing
the IRQ0R bit.
Description
An interrupt request is not input to IRQ4 pin
An interrupt request is input to IRQ4 pin
Description
An interrupt request is not input to IRQ3 pin
An interrupt request is input to IRQ3 pin
Description
An interrupt request is not input to IRQ2 pin
An interrupt request is input to IRQ2 pin
Description
An interrupt request is not input to IRQ1 pin
An interrupt request is input to IRQ1 pin
Rev.6.00 Mar. 27, 2009 Page 189 of 1036
Section 7 Interrupt Controller (INTC)
REJ09B0254-0600
(Initial value)
(Initial value)
(Initial value)
(Initial value)
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