HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 913

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

27.9
Each pin has an input pullup MOS, which is controlled by SC port control register (SCPCR) in
PFC.
27.9.1
Note: * Undefined
Port SC Data Register (SCPDR) is a 7-bit read/write and 1-bit read register that stores data for
pins SCPT7 to SCPT0. SCP7DT to SCP0DT bit corresponds to SCPT7 to SCPT0 pin. When the
pin function is general output port, if the port is read, the value of the corresponding SCPDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read. Table 27.8 shows the function of SCPDR.
SCPDR is initialized to B'*0000000 by a power-on reset. After initialization, the general input
port function (pullup MOS: on) is set as the initial pin function, and the corresponding pin levels
are read from bits SCP7DT to SCP5DT, SCP3DT, and SCP1DT. It retains its previous value in
standby mode and sleep mode, and by a manual reset.
Note that the low level is read if bit 7 is read except in general-purpose input.
Set the RE bit in SCSCR to 1, when reading RxD2 to RxD0 pin states of the SCP4DT, SCP2DT,
and SCP0DT bits in SDPDR while the TE or RE bit in SCSCR is not cleared to 0. When the RE
bit is set to 1, the RxD pins function as input pins and their states are read in preference to the
SCPCR setting.
Initial value:
SC Port
Port SC Data Register (SCPDR)
R/W:
Bit:
SCP7DT SCP6DT SP5DT SCP4DT SCP3DT SCP2DT SCP1DT SCP0DT
R
7
*
R/W
6
0
R/W
5
0
R/W
4
0
Rev.6.00 Mar. 27, 2009 Page 855 of 1036
R/W
3
0
R/W
2
0
Section 27 I/O Ports
REJ09B0254-0600
R/W
1
0
R/W
0
0