HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 808

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Section 24 USB HOST Module
24.2.21 HcRhStatus
HcRhStatus Register (H'04000450)
The HcRhStatus register is divided into two parts. The lower word of a long word indicates the
hub status bits and the upper word indicates the hub status change bit. Reserved bits should be set
to 0.
Register: HcRhStatus
Bits
31
30–18
17
16
15
14–2
Rev.6.00 Mar. 27, 2009 Page 750 of 1036
REJ09B0254-0600
Reset
0
0h
0
0
0
0h
R/W
W
R/W
R/W
R/W
Offset: 50–53
Description
ClearRemoteWakeupEnable (CRWE)
Writing a 1 to this bit clears DeviceRemoteWakeupEnable.
Writing a 0 has no effect.
Reserved. Read/Write 0's
OverCurrentIndicatorChange (OCIC)
This bit is set when OverCurrentIndicator changes. Writing a 1
clears this bit. Writing a 0 has no effect.
(read) LocalPowerStatusChange (LPSC)
The root hub does not support the local power status function.
Therefore, this bit is always read 0.
(write) SetGlobalPower
This bit is written to 1 to power on (clears the PortPowerStatus
bit) all ports in global power mode (PowerSwitchingMode = 0).
This bit sets the PortPowerStatus bit only to the port in which
the PortPowerControlMask bit is not set in power mode at each
port. When 0 is written to, this bit is not cleared.
(read) DeviceRemoteWakeupEnable (DRWE)
This bit enables the ConnectStatusChange bit as a resume
event and generates the state transition from UsbSuspend to
UsbResume and ResumeDetected interrupt.
0: ConnectStatusChange is not the remote wakeup event
1: ConnectStatusChange is the remote wakeup event.
(write) SetRemoteWakeupEnable
Writing a 1 sets DeviceRemoteWakeupEnable. Writing a 0 has
no effect.
Reserved.
(initial value)

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