HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 836

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 25 LCD Controller
25.2.9
These registers are for accessing palette data directly allocated (4 bytes
memory space. To access the palette memory, access the corresponding register among this
register group (LDPR00 to LDPRFF). Each palette register is a 32-bit register including three 8-bit
areas for R, G, and B. For details on the color palette specifications, see section 25.3.3, Color
Palette Specification.
*: Undefined
Bits 31 to 24—Reserved
Bits 18 to 16, 9, 8, and 2 to 0—Reserved Bits in Palettes R, G, and B (Though they cannot be
changed, they are extended according to the upper bits.)
Bits 23 to 19, 15 to 10, 7 to 3—Palette Data (PALD00 to PALDFF):
PALD00: H'10008000
PALDnn: (H'10008000+4
PALDFF: H'100083FC
Rev.6.00 Mar. 27, 2009 Page 778 of 1036
REJ09B0254-0600
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Palette Data Registers 00 to FF (LDPR00 to LDPRFF)
D00-FF
PAL
R/W
31
15
—
R
*
*
D00-FF
R/W
PAL
30
—
14
R
*
*
D00-FF
PAL
R/W
29
13
—
R
*
*
×
D00-FF
nn)
PAL
R/W
28
12
—
R
*
*
D00-FF
R/W
PAL
27
—
11
R
*
*
D00-FF
PAL
R/W
26
10
—
R
*
*
D00-FF
PAL
R/W
25
—
R
*
9
*
D00-FF
R/W
PAL
24
—
R
8
*
*
D00-FF
D00-FF
PAL
R/W
PAL
R/W
23
*
7
*
D00-FF
D00-FF
PAL
R/W
PAL
R/W
22
*
6
*
D00-FF
D00-FF
R/W
R/W
PAL
PAL
21
5
*
*
D00-FF
×
D00-FF
PAL
R/W
PAL
R/W
20
256 addresses) to the
*
4
*
D00-FF
D00-FF
PAL
R/W
PAL
R/W
19
*
3
*
D00-FF
D00-FF
R/W
R/W
PAL
PAL
18
2
*
*
D00-FF
D00-FF
PAL
R/W
PAL
R/W
17
*
1
*
D00-FF
D00-FF
PAL
R/W
PAL
R/W
16
*
0
*