HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 453

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Bits 11 to 8 — DMA Channel 2 Request Assign 3 to 0 (CH2RID3 to CH2RID0): These bits
select DMA requests from DMA channel 2.
Bits 11 to 8:
CH2RID3 to CH2RID0
0000
0001
0010
1001
1010
Bits 7 to 4— DMA Channel 1 Request Assign 3 to 0 (CH1RID3 to CH1RID0): These bits
select DMA requests from DMA channel 1.
Bits 7 to 4:
CH1RID3 to CH1RID0
0000
0001
0010
1001
1010
Bits 3 to 0— DMA Channel 0 Request Assign 3 to 0 (CH0RID3 to CH0RID0): These bits
select DMA requests from DMA channel 0.
Bits 3 to 0:
CH0RID3 to CH0RID0
0000
0001
0010
1001
1010
Description
channel 2
from channel 2
channel 1
from channel 1
channel 0
from channel 0
Unused
USBF (USB function) reception requests to the DMA are selected from
USBF (USB function) transmission requests to the DMA are selected
SIOF reception requests to the DMA are selected from channel 2
SIOF transmission requests to the DMA are selected from channel 2
Description
Unused
USBF (USB function) reception requests to the DMA are selected from
USBF (USB function) transmission requests to the DMA are selected
SIOF reception requests to the DMA are selected from channel 1
SIOF transmission requests to the DMA are selected from channel 1
Description
Unused
USBF (USB function) reception requests to the DMA are selected from
USBF (USB function) transmission requests to the DMA are selected
SIOF reception requests to the DMA are selected from channel 0
SIOF transmission requests to the DMA are selected from channel 0
Section 14 Direct Memory Access Controller (DMAC)
Rev.6.00 Mar. 27, 2009 Page 395 of 1036
REJ09B0254-0600
(Initial value)
(Initial value)
(Initial value)