HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 772

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Section 23 USB Function Controller
to the host automatically. When reading of the receive data is completed following data reception,
1 is written to the USBTRG/EP1 RDFN bit. This operation empties the FIFO that has just been
read, and makes it ready to receive the next packet.
23.6.5
Rev.6.00 Mar. 27, 2009 Page 714 of 1036
REJ09B0254-0600
USBIFR0/EP2 EMPTY status
bit automatically cleared to 0
EP2 Bulk-In Transfer (Dual FIFOs)
Data transmission to host
IN token reception
in EP2 FIFO?
in EP2 FIFO?
Valid data
Space
Yes
No
ACK
Figure 23.11 EP2 Bulk-In Transfer Operation
USB function
No
Yes
NACK
bit automatically
USBIFR0/EP2
EMPTY status
set 1
Interrupt
request
USBIFR0/EP2 TR interrupt
(USBTRG/EP2 PKTE = 1)
Write 1 to USBIER0/EP2
Write one-packet data to
USBIFR0/EP2 EMPTY
Write 1 to EP2 packet
USBEP2 data register
Application
EMPTY enable bit
enable bit
interrupt

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