NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 212

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 85.
212
GateState1
GateState1
GateState1
GateState1
GateState2
GateState2
GateState2
GateState2
GateState2
Current
USB Legacy Keyboard State Transitions
State
64h / Write
64h / Write
64h / Write
60h / Write
60h / Read
64h / Read
64h / Read
60h / Read
64 / Write
Action
Not D1h
Not FFh
Value
Data
D1h
XXh
N/A
N/A
N/A
N/A
FFh
GateState1
GateState1
GateState2
State
Next
ILDE
IDLE
IDLE
IDLE
IDLE
IDLE
Cycle passed through to 8042, even if trap
enabled via Bit 3 in Config Register. No SMI#
generated. PSTATE remains 1. Stay in
GateState1 because this is part of the
double-trigger sequence.
Bit 3 in Config space determines if cycle
passed through to 8042 and if SMI#
generated. PSTATE goes to 0. If Bit 7 in
Config Register is set, then SMI# should be
generated.
This is an invalid sequence. Bit 0 in Config
Register determines if cycle passed through
to 8042 and if SMI# generated. PSTATE goes
to 0. If Bit 7 in Config Register is set, then
SMI# should be generated.
Just stay in same state. Generate an SMI# if
enabled in Bit 2 of Config Register. PSTATE
remains 1.
Standard end of sequence. Cycle passed
through to 8042. PSTATE goes to 0. Bit 7 in
Config Space determines if SMI# should be
generated.
Improper end of sequence. Bit 3 in Config
Register determines if cycle passed through
to 8042 and if SMI# generated. PSTATE goes
to 0. If Bit 7 in Config Register is set, then
SMI# should be generated.
Just stay in same state. Generate an SMI# if
enabled in Bit 2 of Config Register. PSTATE
remains 1.
Improper end of sequence. Bit 1 in Config
Register determines if cycle passed through
to 8042 and if SMI# generated. PSTATE goes
to 0. If Bit 7 in Config Register is set, then
SMI# should be generated.
Improper end of sequence. Bit 0 in Config
Register determines if cycle passed through
to 8042 and if SMI# generated. PSTATE goes
to 0. If Bit 7 in Config Register is set, then
SMI# should be generated.
Comment
Intel
®
Functional Description
ICH8 Family Datasheet