NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 263

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register and Memory Mapping
6.4.1
Note:
Note:
Note:
Intel
®
ICH8 Family Datasheet
Boot-Block Update Scheme
The ICH8 supports a “top-block swap” mode that has the ICH8 swap the top block in
the Firmware Hub (the boot block) with another location. This allows for safe update of
the Boot Block (even if a power failure occurs). When the “TOP_SWAP” Enable bit is
set, the ICH8 will invert A16 for cycles targeting Firmware Hub space. When this bit is
0, the ICH8 will not invert A16. This bit is automatically set to 0 by RTCRST#, but not
by PLTRST#.
The scheme is based on the concept that the top block is reserved as the “boot” block,
and the block immediately below the top block is reserved for doing boot-block
updates.
The algorithm is:
If a power failure occurs at any point after step 3, the system will be able to boot from
the copy of the boot block that is stored in the block below the top. This is because the
TOP_SWAP bit is backed in the RTC well.
The top-block swap mode may be forced by an external strapping option (See
Section
bit cannot be cleared by software. A re-boot with the strap removed will be required to
exit a forced top-block swap mode.
Top-block swap mode only affects accesses to the Firmware Hub space, not feature
space.
The top-block swap mode has no effect on accesses below FFFE_0000h.
1. Software copies the top block to the block immediately below the top
2. Software checks that the copied block is correct. This could be done by performing
3. Software sets the TOP_SWAP bit. This will invert A16 for cycles going to the
4. Software erases the top block
5. Software writes the new top block
6. Software checks the new top block
7. Software clears the TOP_SWAP bit
8. Software sets the Top_Swap Lock-Down bit
a checksum calculation.
Firmware Hub. processor access to FFFF_0000h through FFFF_FFFFh will be
directed to FFFE_0000h through FFFE_FFFFh in the Firmware Hub, and processor
accesses to FFFE_0000h through FFFE_FFFF will be directed to FFFF_0000h
through FFFF_FFFFh.
2.26.1). When top-block swap mode is forced in this manner, the TOP_SWAP
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