NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 775

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Peripheral Interface (SPI)
20.2.5.7
Note:
Intel
®
ICH8 Family Datasheet
VSCC0n—Vendor Specific Component Capabilities n
Memory Address:VTBA + 004h + (n*8)
Default Value:
“n” is an integer denoting the number of table entries.
31:17
15:8
Bits
7:4
1:0
16
3
2
Reserved
Write Enable on Write Status (WEWS):
0 = No Write Enable (06h) opcode is required to write to the SPI Flash Status
1 = Write Enable (06h) opcode is required to write to the SPI Flash Status Register(s) prior to write
NOTE: If there is more than one component, both components must use the same Write
Erase Opcode (EO): This register is programed with the Flash erase instruction opcode
required by this vendors Flash component.
NOTE: If there is more than one component, both components must use the same
Reserved
Write Status Required (WSR):
0 = No requirement to write to the Write Status Register prior to a write
1 = Enable status register write (50h) command is required to write to the Write Status register
NOTE: If there is more than one component, both components must use the same Write
Write Granularity (WG):
0 = 1 Byte
1 = 64 Byte
All Other Settings = Reserved
NOTE: If more than one Flash component exists, this field must be set to the lowest
Block/Sector Erase Size (BES): This field identifies the erasable sector size for all
Flash components.
Valid Bit Settings:
00 = 256 Byte
01 = 4 KB
10 = Reserved for future use
11 = 64 KB
NOTE: If supporting more than one Flash component, all flash components must have
register(s).
and erase to remove SPI flash protection.
Enable on to write to the Status Register on the SPI flash.
Erase Opcode.
Status Required. Uses 50h to enable a write to the Write Status Register
common write granularity of the different Flash components.
identical Block/ Sector erase sizes.
Description
Attribute:
Size:
32 bits
775