NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 228

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
Table 88.
228
changes slightly: the Byte Count (bits 27:20 in the bit sequence) are not sent - as a
result, the slave will not acknowledge (bit 28 in the sequence).
I
This command allows the ICH8 to perform block reads to certain I
serial E
However, this does not allow access to devices using the I
has data bytes after the address. Typically these data bytes correspond to an offset
(address) within the serial memory chips.
This command is supported independent of the setting of the I2C_EN bit. The I
command with the PEC_EN bit set produces undefined results. Software must force
both the PEC_EN and AAC bit to 0 when running this command.
For I
Register (SMB I/O register, offset 04h) needs to be 0.
The format that is used for the command is shown in
I
The ICH8 will continue reading data from the peripheral until the NAK is received.
2
2
C Block Read
C Read
18:11
27:21
37:30
46:39
8:2
Bit
10
19
20
28
29
38
47
2
1
9
–
–
–
–
C Read command, the value written into bit 0 of the Transmit Slave Address
2
PROMs. The SMBus Block Read supports the 7-bit addressing mode only.
Start
Slave Address — 7 bits
Write
Acknowledge from slave
Send DATA1 register
Acknowledge from slave
Repeated Start
Slave Address — 7 bits
Read
Acknowledge from slave
Data byte 1 from slave — 8 bits
Acknowledge
Data byte 2 from slave — 8 bits
Acknowledge
Data bytes from slave /
Acknowledge
Data byte N from slave — 8 bits
NOT Acknowledge
Stop
Description
Table
2
C “Combined Format” that
88.
Intel
2
C devices, such as
®
Functional Description
ICH8 Family Datasheet
2
C Read