NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 305

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chipset Configuration Registers
Intel
®
ICH8 Family Datasheet
7:5
Bit
13
12
11
10
9
8
4
3
2
1
0
EHCI #2 Disable (EHCI2D) — R/W. Default is 0.
0 = The EHCI #2 is enabled.
1 = The EHCI #2 is disabled.
NOTE: When this bit is set, the UHCI #5 function is not available and the UHCI #4
USB1 #5 Disable (U5D) — R/W. Default is 0
0 = The UHCI #5 is enabled.
1 = The UHCI #5 is disabled.
NOTE: When the EHCI #2 Device Disable (EHCI2D) is set, this bit is a don’t care
UHCI #4 Disable (U4D) — R/W. Default is 0.
0 = The 4th UHCI (ports 6 and 7) is enabled.
1 = The 4th UHCI (ports 6 and 7) is disabled.
NOTE: UHCI #4 must be disabled when EHCI #2 is disabled with bit 13 in this
UHCI #3 Disable (U3D) — R/W. Default is 0.
0 = The 3rd UHCI (ports 4 and 5) is enabled.
1 = The 3rd UHCI (ports 4 and 5) is disabled.
UHCI #2 Disable (U2D) — R/W. Default is 0.
0 = The 2nd UHCI (ports 2 and 3) is enabled.
1 = The 2nd UHCI (ports 2 and 3) is disabled.
UHCI #1 Disable (U1D) — R/W. Default is 0.
0 = The 1st UHCI (ports 0 and 1) is enabled.
1 = The 1st UHCI (ports 0 and 1) is disabled.
Reserved
Intel
0 = The Intel High Definition Audio controller is enabled.
1 = The Intel High Definition Audio controller is disabled and its PCI configuration
SM Bus Disable (SD) — R/W. Default is 0.
0 = The SM Bus controller is enabled.
1 = The SM Bus controller is disabled. In ICH5 and previous, this also disabled the
Serial ATA Disable 1 (SAD1) — R/W. Default is 0.
0 = The SATA controller #1 (D31:F2) is enabled.
1 = The SATA controller #1 (D31:F2) is disabled.
Reserved
BIOS must set this bit to 0b
space is not accessible.
I/O space. In ICH8, it only disables the configuration space.
®
must be disabled by setting bit 11 in this register.
register.
High Definition Audio Disable (ZD) — R/W. Default is 0.
Description
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