NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 255

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NH82801HBM S LB9A

Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet

Specifications of NH82801HBM S LB9A

Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register and Memory Mapping
6
6.1
Intel
®
ICH8 Family Datasheet
Register and Memory Mapping
The ICH8 contains registers that are located in the processor’s I/O space and memory
space and sets of PCI configuration registers that are located in PCI configuration
space. This chapter describes the ICH8 I/O and memory maps at the register-set level.
Register access is also described. Register-level address maps and Individual register
bit descriptions are provided in the following chapters. The following notations and
definitions are used in the register/instruction description chapters.
RO
WO
R/W
R/WC
R/WO
R/WLO
Default
Bold
PCI Devices and Functions
The Intel ICH8 incorporates a variety of PCI devices and functions, as shown in
Table
(Device 30). The second device (Device 31) contains most of the standard PCI
functions that always existed in the PCI-to-ISA bridges (South Bridges), such as the
Intel PIIX4 or Intel PIIX6. The third and fourth (Device 29 and Device 26) are the USB
99. They are divided into seven logical devices. The first is the DMI-To-PCI bridge
Read Only. In some cases, If a register is read only, writes to this
register location have no effect. However, in other cases, two
separate registers are located at the same location where a read
accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
Write Only. In some cases, If a register is write only, reads to
this register location have no effect. However, in other cases,
two separate registers are located at the same location where a
read accesses one of the registers and a write accesses the
other register. See the I/O and memory map tables for details.
Read/Write. A register with this attribute can be read and
written.
Read/Write Clear. A register bit with this attribute can be read
and written. However, a write of 1 clears (sets to 0) the
corresponding bit and a write of 0 has no effect.
Read/Write-Once. A register bit with this attribute can be
written only once after power up. After the first write, the bit
becomes read only.
Read/Write, Lock-Once. A register bit with this attribute can be
written to the non-locked value multiple times, but to the locked
value only once. After the locked value has been written, the bit
becomes read only.
When ICH8 is reset, it sets its registers to predetermined default
states. The default state represents the minimum functionality
feature set required to successfully bring up the system. Hence,
it does not represent the optimal system configuration. It is the
responsibility of the system initialization software to determine
configuration, operating parameters, and optional system
features that are applicable, and to program the ICH8 registers
accordingly.
Register bits that are highlighted in bold text indicate that the
bit is implemented in the ICH8. Register bits that are not
implemented or are hardwired will remain in plain text.
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