NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 845

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
Table 170.
Table 171.
Intel
®
ICH8 Family Datasheet
tBIT
tBIT,jitter
tBIT,drift
tH1
tH0
t
t
t
t
t
t
t
t
t
SSTR
SSTF
BIT
BIT,jitter
BIT,drift
H1
H0
PECIR
PECIF
Sym
Sym
SST Timings (Desktop Only)
NOTE:
1.
2.
PECI Timings (Desktop Only)
NOTE:
1.
2.
3.
Bit time (overall time evident on PECI)
Bit time driven by an originator
Bit time jitter between adjacent bits in an
PECI message header or data bytes after
timing has been negotiated
Change in bit time across a PECI address or
PECI message bits as driven by the originator.
This limit only applies across t
and t
High level time for logic 1
High level time for logic 0
Rise time (measured from V
Vtt
Fall time (measured from V
Vtt
Bit time (overall time evident on SST)
Bit time driven by an originator
Bit time jitter between adjacent bits in an SST
message header or data bytes after timing has
been negotiated
Change in bit time across a SST address or SST
message bits as driven by the originator. This
limit only applies across tBIT-A bit drift and tBIT-
M drift.
High level time for logic 1
High level time for logic 0
Rise time (measured from VOL = 0.3V to
VIH,min)
Fall time (measured from VOH = 1.1V to
VIL,max)
(nom)
(nom)
The originator must drive a more restrictive time to allow for quantized sampling errors by
a client yet still attain the minimum time less than 500µs. tBIT limits apply equally to tBIT-
A and tBIT-M. ICH8 is targeted on 1Mbps which is 1µs bit time.
The minimum and maximum bit times are relative to tBIT defined in the Timing
Negotiation pulse.
The originator must drive a more restrictive time to allow for quantized sampling errors by
a client yet still attain the minimum time less than 500 µs. t
t
The minimum and maximum bit times are relative to t
pulse.
Extended trace lengths may appear as additional nodes.
BIT-A
BIT-M
–5%)
+5%)
and t
drift.
BIT-M
Parameter
Parameter
. The ICH8 is targeted on 2 MHz which is 500 ns bit time.
OH
OL
BIT-A
to V
to V
IL,max
IH,min
bit drift
,
,
0.495
0.495
Min
0.6
0.2
0.495
0.495
—
—
—
—
Min
0.6
0.2
—
—
—
—
BIT
30 + 5
25 + 5
Max
500
250
defined in the Timing Negotiation
0.8
0.4
Max
30
500
250
—
—
0.8
0.4
33
—
—
BIT
limits apply equally to
ns/node
ns/node
Units
x t
x t
x tBIT
node
node
Units
x tBIT
ns/
ns/
µs
µs
%
%
µs
µs
%
%
BIT
BIT
Fig
39
39
39
Fig
39
39
39
Notes
Notes
1
2
3
3
1
2
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