NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 570

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.1.10
14.1.11
14.1.12
570
HEADTYP—Header Type Register
(USB—D29:F0/F1/F2, D26:F0/F1)
Address Offset:
Default Value:
For UHCI #2, 3, and 5 this register is hardwired to 00h. For UHCI #1 and UHCI #4,
bit 7 is determined by the values in the USB Function Disable bits (11:8 of the Function
Disable register Chipset Configuration Registers:Offset 3418h).
BASE—Base Address Register
(USB—D29:F0/F1/F2, D26:F0/F1)
Address Offset:
Default Value:
SVID — Subsystem Vendor Identification Register
(USB—D29:F0/F1/F2, D26:F0/F1)
Address Offset: 2Ch–2Dh
Default Value:
Lockable:
31:16
15:5
15:0
4:1
6:0
Bit
Bit
Bit
0
7
Reserved
Base Address — R/W. Bits [15:5] correspond to I/O address signals AD [15:5],
respectively. This gives 32 bytes of relocatable I/O space.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate that the base address
field in this register maps to I/O space.
Subsystem Vendor ID (SVID) — R/WO. BIOS sets the value in this register to identify
the Subsystem Vendor ID. The USB_SVID register, in combination with the USB
Subsystem ID register, enables the operating system to distinguish each subsystem
from the others.
NOTE: The software can write to this register only once per core well reset. Writes
Multi-Function Device — RO. Since the upper functions in this device can be
individually hidden, this bit is based on the function-disable bits in Chipset Config
Space: Offset 3418h as follows:
0 = Single-function device. (Default for UHCI #2,3 and5)
1 = Multi-function device. (Default for UHCI #1 and 4)
Configuration Layout. Hardwired to 00h, which indicates the standard PCI configuration
layout.
should be done as a single, 16-bit cycle.
0000h
No
0Eh
See Bit Description
20h
00000001h
–
23h
Description
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Attribute:
Size:
R/WO
16 bits
Core
RO
8 bits
R/W, RO
32 bits
UHCI Controllers Registers
Intel
®
ICH8 Family Datasheet