NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 493
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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SATA Controller Registers (D31:F2)
12.1.42
.
12.1.43
.
12.1.44
.
Intel
®
ICH8 Family Datasheet
SIR28—SATA Indexed Registers Index 28h
(SATA Initialization Register 28h)
Address Offset: Index 28h - 2Bh
Default Value:
SIR40—SATA Indexed Registers Index 40h
(SATA Initialization Register 40h)
Address Offset: Index 40h - 43h
Default Value:
STTT2—SATA Indexed Registers Index 74h
(SATA TX Termination Test Register 2)
Address Offset: Index 74h - 77h
Default Value:
31:24
23:16
31:18
31:0
15:0
15:0
Bit
Bit
Bit
17
16
BIOS programs this field to 00CC2080h.
Reserved
BIOS programs this field to 22h.
Reserved
Reserved.
Port 3 TX Termination Test Enable — R/W:
0 = Port 3 TX termination port testing is disabled.
1 = Setting this bit will enable testing of Port 3 TX termination.
Note: This bit only to be used for system board testing.
Port 2 TX Termination Test Enable — R/W:
0 = Port 2 TX termination port testing is disabled.
1 = Setting this bit will enable testing of Port 2 TX termination.
Note: This bit only to be used for system board testing.
Reserved.
00CC2080h
0011006Dh
00000000h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W
32 bits
R/W
32 bits
R/W
32 bits
493
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