MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 162

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Interrupt Controller Module
7.7.2.4 Interrupt Pending Register
Technical Data
162
Address: 0x00c5_000c through 0x00c5_000f
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
The 32-bit, read-only interrupt pending register (IPR) reflects any
currently pending interrupts which are assigned to each priority level.
Writes to this register have no effect and are terminated normally.
IP[31:0] — Interrupt Pending Field
A read-only IPx bit is set when at least one interrupt request is
asserted at priority level x. Reset clears IP[31:0].
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = At least one interrupt request asserted at priority level x
0 = All interrupt requests at level x negated
Bit 31
Bit 23
Bit 15
IP31
IP23
IP15
Bit 7
IP7
0
0
0
0
Figure 7-6. Interrupt Pending Register (IPR)
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Interrupt Controller Module
= Writes have no effect and the access terminates without a transfer error exception.
IP30
IP22
IP14
IP6
30
22
14
0
0
0
6
0
IP29
IP21
IP13
IP5
29
21
13
0
0
0
5
0
IP28
IP20
IP12
IP4
28
20
12
0
0
0
4
0
IP27
IP19
IP11
IP3
27
19
11
0
0
0
3
0
IP26
IP18
IP10
IP2
26
18
10
0
0
0
2
0
MMC2107 – Rev. 2.0
IP25
IP17
IP9
IP1
25
17
0
0
9
0
1
0
MOTOROLA
Bit 24
Bit 16
IP24
IP16
Bit 8
Bit 0
IP8
IP0
0
0
0
0