MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 402

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Queued Analog-to-Digital Converter (QADC)
18.3 Features
Technical Data
402
the digital-to-analog converter (DAC) resistor-capacitor (RC) array and
a high-gain comparator.
The digital control section contains queue control logic to sequence the
conversion process and interrupt generation logic. Also included are the
periodic/interval timer, control and status registers, the conversion
command word (CCW) table, random-access memory (RAM), and the
result table RAM.
The bus interface unit (BIU) allows the QADC to operate with the
applications software through the IPbus environment.
Features of the QADC module include:
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Internal sample and hold
Up to eight analog input channels using internal multiplexing
Directly supports up to four external multiplexers (for example, the
MC14051)
Up to 18 total input channels with internal and external
multiplexing
Programmable input sample time for various source impedances
Two conversion command queues with a total of 64 entries
Sub-queues possible using pause mechanism
Queue complete and pause software interrupts available on both
queues
Queue pointers indicate current location for each queue
Automated queue modes initiated by:
– External edge trigger and gated trigger
– Periodic/interval timer, within QADC module [queues 1 and 2]
– Software command
Single-scan or continuous-scan of queues
64 result registers
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MMC2107 – Rev. 2.0
MOTOROLA