MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 420

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Queued Analog-to-Digital Converter (QADC)
Technical Data
420
PIE1 — Queue 1 Pause Interrupt Enable Bit
SSE1 — Queue 1 Single-Scan Enable Bit
MQ1[12:8] — Queue 1 Operating Mode Field
MQ1[12:8]
PIE1 enables an interrupt when queue 1 enters the pause state. The
interrupt request is initiated when conversion is complete for a CCW
that has the pause bit set.
SSE1 enables a single-scan of queue 1 to start after a trigger event
occurs. The SSE1 bit may be set to a 1 during the same write cycle
when the MQ1 bits are set for one of the single-scan queue operating
modes. The single-scan enable bit can be written as a 1 or a 0, but is
always read as a 0, unless a test mode is selected. The SSE1 bit
enables a trigger event to initiate queue execution for any single-scan
operation on queue 1.The QADC clears the SSE1 bit when the
single-scan is complete.
The MQ1 field selects the queue operating mode for queue 1.
Table 18-5
queue 1 operating modes.
Freescale Semiconductor, Inc.
00000
00001
00010
00011
00100
00101
00110
00111
01000
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Queued Analog-to-Digital Converter (QADC)
1 = Enable an interrupt after an end-of-conversion for queue 1
0 = Disable the pause interrupt associated with queue 1.
1 = Accept a trigger event to start queue 1 in a single-scan mode.
0 = Trigger events are not accepted for single-scan modes.
which has the pause bit set.
Disabled mode, conversions do not occur
Software-triggered single-scan mode (started with SSE1)
External-trigger rising-edge single-scan mode
External-trigger falling-edge single-scan mode
Interval timer single-scan mode: time = QCLK period
Interval timer single-scan mode: time = QCLK period
Interval timer single-scan mode: time = QCLK period
Interval timer single-scan mode: time = QCLK period
Interval timer single-scan mode: time = QCLK period
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shows the bits in the MQ1 field which enable different
Table 18-5. Queue 1 Operating Modes
Operating Mode
MMC2107 – Rev. 2.0
2
2
2
2
2
7
8
9
10
11
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