MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 462

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Queued Analog-to-Digital Converter (QADC)
Technical Data
462
The previous situations cover normal overlap conditions that arise with
asynchronous trigger events on the two queues. An additional conflict to
consider is that the freeze condition can arise while the QADC is actively
executing CCWs. The conventional use for the debug mode is for
software/hardware debugging. When the CPU background debug mode
is enabled and a breakpoint occurs, the freeze signal is issued, which
can cause peripheral modules to stop operation. When freeze is
detected, the QADC completes the conversion in progress, unlike queue
1 suspending queue 2. After the freeze condition is removed, the QADC
continues queue execution with the next CCW in sequence.
Trigger events that occur during freeze are not captured. When a trigger
event is pending for queue 2 before freeze begins, that trigger event is
remembered when the freeze is passed. Similarly, when freeze occurs
while queue 2 is suspended, after freeze, queue 2 resumes execution as
soon as queue 1 is finished.
Situations 12 through 19
of all of the freeze situations.
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Go to: www.freescale.com
Figure 18-34. CCW Freeze Situation 12
Figure 18-35. CCW Freeze Situation 13
Q1:
Q2:
T1
T2
C1
C1
C2
(Figure 18-34
C2
FREEZE
FREEZE
to
Figure
C3
C3
18-41) show examples
C4
C4
MMC2107 – Rev. 2.0
CF1
CF2
MOTOROLA