MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 301

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
15.7.2 Timer Compare Force Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: TIM1 — 0x00ce_0001
Reset:
Read: Anytime
Write: Anytime
FOC[3:0] — Force Output Compare Bits
A successful channel 3 output compare overrides any channel 2:0
compares. For each OC3M bit that is set, the output compare action
reflects the corresponding OC3D bit.
Read:
Write:
Setting an FOC bit causes an immediate output compare on the
corresponding channel. Forcing an output compare does not set the
output compare flag.
Freescale Semiconductor, Inc.
Figure 15-3. Timer Compare Force Register (TIMCFORC)
For More Information On This Product,
1 = Force output compare
0 = No effect
TIM2 — 0x00cf_0001
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
FOC3
3
0
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
FOC2
2
0
0
FOC1
1
0
0
Technical Data
FOC0
Bit 0
0
0
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