MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 314

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Timer Modules (TIM1 and TIM2)
15.7.14 Timer Channel Registers
Technical Data
314
Address: TIMC0H — 0x00ce_0010/0x00cf_0010
Address: TIMC0L — 0x00ce_0011/0x00cf_0011
Reset:
Reset:
Read: Anytime
Write: Output compare channel, anytime; input capture channel, no
effect
When a channel is configured for input capture (IOSx = 0), the timer
channel registers latch the value of the free-running counter when a
defined transition occurs on the corresponding input capture pin.
When a channel is configured for output compare (IOSx = 1), the timer
channel registers contain the output compare value.
To ensure coherent reading of the timer counter, such that a timer
rollover does not occur between back-to-back 8-bit reads, it is
recommended that only half-word (16-bit) accesses be used.
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
Figure 15-17. Timer Channel [0:3] Register High (TIMCxH)
Figure 15-18. Timer Channel [0:3] Register Low (TIMCxL)
For More Information On This Product,
TIMC1H — 0x00ce_0012/0x00cf_0012
TIMC2H — 0x00ce_0014/0x00cf_0014
TIMC3H — 0x00ce_0016/0x00cf_0016
TIMC1L — 0x00ce_0013/0x00cf_0013
TIMC2L — 0x00ce_0015/0x00cf_0015
TIMC3L — 0x00ce_0017/0x00cf_0017
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
Go to: www.freescale.com
14
6
0
6
6
0
13
5
0
5
5
0
12
4
0
4
4
0
11
3
0
3
3
0
10
2
0
2
2
0
MMC2107 – Rev. 2.0
1
9
0
1
1
0
MOTOROLA
Bit 0
Bit 8
Bit 0
Bit 0
0
0