MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 547

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

21.10 Non-Scan Chain Operation
21.11 Boundary Scan
MMC2107 – Rev. 2.0
MOTOROLA
MMC2107 features a low-power stop mode. The interaction of the scan
chain interface with low-power stop mode is:
Keeping the TAP controller in the test-logic-reset state will ensure that
the scan chain test logic is kept transparent to the system logic. It is
recommended that TMS, TDI, TCLK, and TRST be pulled up. TRST
could be connected to ground. However, since there is a pullup on
TRST, some amount of current will result. JTAG will be initialized to the
test-logic-reset state on power-up without TRST asserted low due to the
JTAG power-on-reset internal input. The low-level TAP module in the
M•CORE also has the power-on-reset input.
The MMC2107 boundary-scan register contains 200 bits. This register
can be connected between TDI and TDO when EXTEST or
SAMPLE/PRELOAD instructions are selected. This register is used for
capturing signal pin data on the input pins, forcing fixed values on the
output signal pins, and selecting the direction and drive characteristics
(a logic value or high impedance) of the bidirectional and three-state
signal pins.
This IEEE 1149.1 standard-compliant boundary-scan register contains
bits for bonded-out and non-bonded signals excluding JTAG signals,
analog signals, power supplies, compliance enable pins, and clock
1. The TAP controller must be in the test-logic-reset state to either
2. The TCLK input is not blocked in low-power stop mode. To
3. The TMS, TDI, TRST pins include on-chip pullup resistors. In
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enter or remain in the low-power stop mode. Leaving the
test-logic-reset state negates the ability to achieve low-power, but
does not otherwise affect device functionality.
consume minimal power, the TCLK input should be externally
connected to V
low-power stop mode, these three pins should remain either
unconnected or connected to V
consumption.
JTAG Test Access Port and OnCE
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DD
.
DD
to achieve minimal power
JTAG Test Access Port and OnCE
Non-Scan Chain Operation
Technical Data
547