MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 313

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

15.7.13 Timer Flag Register 2
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: TIM1 — 0x00ce_000f
Reset:
Read: Anytime
Write: Anytime; writing 1 clears flag; writing 0 has no effect
TOF — Timer Overflow Flag
When the timer channel 3 registers contain $FFFF and TCRE is set,
TOF never gets set even though the timer counter registers go from
$FFFF to $0000.
When the fast flag clear all bit, TFFCA, is set, any access to the timer
counter registers clears timer flag register 2. The TFFCA bit is in timer
system control register 1 (TIMSCR1).
When TOF is set, it does not inhibit subsequent overflow events.
Read:
Write:
TOF is set when the timer counter rolls over from $FFFF to $0000. If
the TOI bit in TIMSCR2 is also set, TOF generates an interrupt
request. Clear TOF by writing a 1 to it.
Freescale Semiconductor, Inc.
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1 = Timer overflow
0 = No timer overflow
TIM2 — 0x00cf_000f
Bit 7
TOF
0
Figure 15-16. Timer Flag Register 2 (TIMFLG2)
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
3
0
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
2
0
0
1
0
0
Technical Data
Bit 0
0
0
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