MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 303

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

15.7.4 Timer Output Compare 3 Data Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: TIM1 — 0x00ce_0003
Reset:
Read: Anytime
Write: Anytime
OC3D[3:0] — Output Compare 3 Data Bits
A successful channel 3 output compare overrides any channel 2:0
compares. For each OC3M bit that is set, the output compare action
reflects the corresponding OC3D bit.
Read:
Write:
Figure 15-5. Timer Output Compare 3 Data Register (TIMOC3D)
When a successful channel 3 output compare occurs, these bits
transfer to the timer port data register if the corresponding OC3Mx bits
are set.
Freescale Semiconductor, Inc.
For More Information On This Product,
TIM2 — 0x00cf_0003
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
OC3D3
3
0
Timer Modules (TIM1 and TIM2)
OC3D2
Memory Map and Registers
2
0
OC3D1
1
0
Technical Data
OC3D0
Bit 0
0
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