MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 286

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Technical Data
286
NOTE:
PDBG — Debug Mode Bit
Changing the PDBG bit from 1 to 0 during debug mode starts the PIT
timer. Likewise, changing the PDBG bit from 0 to 1 during debug mode
stops the PIT timer.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
The read/write PDBG bit controls the function of the PIT in debug
mode. Reset clears PDBG.
During debug mode, register read and write accesses function
normally. When debug mode is exited, timer operation continues from
the state it was in before entering debug mode, but any updates made
in debug mode remain.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = PIT function stopped in debug mode
0 = PIT function not affected in debug mode
Go to: www.freescale.com
PRE[3:0]
Table 14-2. Prescaler Select Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
System Clock Divisor
16,384
32,768
1,024
2,048
4,096
8,192
128
256
512
16
32
64
1
2
4
8
MMC2107 – Rev. 2.0
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