MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 454

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

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Queued Analog-to-Digital Converter (QADC)
Technical Data
454
to have the pause bit set, to show the similarities of pause and
end-of-queue as terminations of queue execution.
Trigger events are described in
When a trigger event causes a CCW execution in progress to be
aborted, the aborted conversion is shown as a ragged end of a
shortened CCW rectangle.
The situation diagrams also show when key status bits are set.
Table 18-14
Below the queue execution flows are three sets of blocks that show the
status information that is made available to the software. The first two
rows of status blocks show the condition of each queue as:
The third row of status blocks shows the 4-bit QS status register field that
encodes the condition of the two queues. Two transition status cases,
Trigger
Trigger overrun
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T1
T2
error (TOR)
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CF flag
PF flag
Queued Analog-to-Digital Converter (QADC)
Idle
Active
Pause
Suspended (queue 2 only)
Trigger pending
Bit
Events that trigger queue 1 execution (external trigger, software-initiated
single-scan enable bit, or completion of the previous continuous loop)
Events that trigger queue 2 execution (external trigger, software-initiated
single-scan enable bit, timer period/interval expired, or completion of the
previous continuous loop)
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describes the status bits.
Set when the end of the queue is reached
Set when a queue completes execution up through a pause bit
Set when a new trigger event occurs before the queue is finished
serving the previous trigger event
Table 18-13. Trigger Events
Table 18-14. Status Bits
Table
Events
18-13.
Function
MMC2107 – Rev. 2.0
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