MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 321

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
15.7.20 Timer Test Register
15.8 Functional Description
15.8.1 Prescaler
15.8.2 Input Capture
MMC2107 – Rev. 2.0
MOTOROLA
Address: TIM1 — 0x00ce_001f
The timer test register (TIMTST) is only for factory testing. When not in
test mode, TIMTST is read-only.
Reset:
The timer module is a 16-bit, 4-channel timer with input capture and
output compare functions and a pulse accumulator.
The prescaler divides the module clock by 1, 2, 4, 8, 16, 32, 64, or 128.
The PR[2:0] bits in TIMSCR2 select the prescaler divisor.
Clearing an I/O select bit, IOSx, configures channel x as an input capture
channel. The input capture function captures the time at which an
external event occurs. When an active edge occurs on the pin of an input
capture channel, the timer transfers the value in the timer counter into
the timer channel registers, TIMCxH and TIMCxL.
The minimum pulse width for the input capture input is greater than two
module clocks.
The input capture function does not force data direction. The timer port
data direction register controls the data direction of an input capture pin.
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
TIM2 — 0x00cf_001f
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
Figure 15-25. Timer Test Register (TIMTST)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
3
0
0
Timer Modules (TIM1 and TIM2)
2
0
0
Functional Description
1
0
0
Technical Data
Bit 0
0
0
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