MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 396

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Serial Peripheral Interface Module (SPI)
17.8.8 Low-Power Mode Options
17.8.8.1 Run Mode
17.8.8.2 Doze Mode
17.8.8.3 Stop Mode
Technical Data
396
NOTE:
If the mode fault error occurs in bidirectional mode, the DDRSP bit of the
SISO pin is not affected, since it is a general-purpose I/O pin.
This subsection describes the low-power mode options.
Clearing the SPE bit in SPICR1 puts the SPI in a disabled, low-power
state. SPI registers are accessible, but SPI clocks are disabled.
SPI operation in doze mode depends on the state of the SPISDOZ bit in
SPICR2.
Although the slave shift register can receive MOSI data, it cannot
transfer data to SPIDR or set the SPIF flag in doze or stop mode. If the
slave enters doze mode in an idle state and exits doze mode in an idle
state, SPIF remains clear and no transfer to SPIDR occurs.
SPI operation in stop mode is the same as in doze mode with the
SPISDOZ bit set.
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If SPISDOZ is clear, the SPI operates normally in doze mode.
If SPISDOZ is set, the SPI clock stops, and the SPI enters a
low-power state in doze mode.
– Any master transmission in progress stops at doze mode entry
– Any slave transmission in progress continues if a master
Serial Peripheral Interface Module (SPI)
and resumes at doze mode exit.
continues to drive the slave SCK pin. The slave stays
synchronized to the master SCK clock.
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MMC2107 – Rev. 2.0
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