MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 312
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MMCCMB2107
Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet
1.MMCCMB2107.pdf
(618 pages)
Specifications of MMCCMB2107
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Timer Modules (TIM1 and TIM2)
15.7.12 Timer Flag Register 1
Technical Data
312
NOTE:
Address: TIM1 — 0x00ce_000e
Reset:
Read: Anytime
Write: Anytime; writing 1 clears flag; writing 0 has no effect
C[3:0]F — Channel Flags
When the fast flag clear all bit, TFFCA, is set, an input capture read or
an output compare write clears the corresponding channel flag. TFFCA
is in timer system control register 1 (TIMSCR1).
When a channel flag is set, it does not inhibit subsequent output
compares or input captures.
Read:
Write:
A channel flag is set when an input capture or output compare event
occurs. Clear a channel flag by writing a 1 to it.
Freescale Semiconductor, Inc.
For More Information On This Product,
TIM2 — 0x00cf_000e
Bit 7
0
0
Figure 15-15. Timer Flag Register 1 (TIMFLG1)
Timer Modules (TIM1 and TIM2)
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
C3F
3
0
C2F
2
0
MMC2107 – Rev. 2.0
C1F
1
0
MOTOROLA
Bit 0
C0F
0