MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 227

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
10.7.2 Register Descriptions
10.7.2.1 Synthesizer Control Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: 0x00c3_0000 and 0x00c3_0001
Reset:
Reset:
Read:
Write:
Read:
Write:
This subsection provides a description of the clock module registers.
The synthesizer control register (SYNCR) is read/write always.
LOLRE — Loss of Lock Reset Enable Bit
In external clock mode, the LOLRE bit has no effect.
The LOLRE bit determines how the system handles a loss of lock
indication. When operating in normal mode or 1:1 PLL mode, the PLL
must be locked before setting the LOLRE bit. Otherwise reset is
immediately asserted. To prevent an immediate reset, the LOLRE bit
must be cleared before writing the MFD[2:0] bits or entering stop
mode with the PLL disabled.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Reset on loss of lock
0 = No reset on loss of lock
LOCEN
LOLRE
Bit 15
Figure 10-2. Synthesizer Control Register (SYNCR)
Bit 7
0
0
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DISCLK
MFD2
14
0
6
0
Clock Module
FWKUP
MFD1
13
1
5
0
RSVD4
MFD0
12
0
4
0
STMPD1
LOCRE
11
0
3
0
STMPD0
Memory Map and Registers
RFD2
10
0
2
0
RSVD1
RFD1
9
0
1
0
Technical Data
Clock Module
RSVD0
RFD0
Bit 8
Bit 0
1
0
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