MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 344

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

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Serial Communications Interface Modules (SCI1 and SCI2)
16.7.5 SCI Status Register 2
Technical Data
344
Address: SCI1 — 0x00cc_0005
Serial Communications Interface Modules (SCI1 and SCI2)
FE — Framing Error Flag
PF — Parity Error Flag
Reset:
Read: Anytime
Write: Has no meaning or effect
RAF — Receiver Active Flag
Read:
Write:
The FE flag is set when a logic 0 is accepted as the stop bit. FE is set
during the same cycle as the RDRF flag but does not get set in the
case of an overrun. FE inhibits further data reception until it is cleared.
Clear FE by reading SCISR1 and then reading SCIDRL. Reset clears
FE.
The PF flag is set when PE = 1 and the parity of the received data
does not match its parity bit. Clear PF by reading SCISR1 and then
reading SCIDRL. Reset clears PF.
The RAF flag is set when the receiver detects a logic 0 during the RT1
time period of the start bit search. When the receiver detects an idle
character, it clears RAF. Reset clears RAF.
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1 = Framing error
0 = No framing error
1 = Parity error
0 = No parity error
1 = Reception in progress
0 = No reception in progress
SCI2 — 0x00cd_0005
Bit 7
0
0
Figure 16-7. SCI Status Register 2 (SCISR2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
3
0
0
2
0
0
MMC2107 – Rev. 2.0
1
0
0
MOTOROLA
Bit 0
RAF
0