MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 94

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Chip Configuration Module (CCM)
3.7.2 Memory Map
3.7.3 Register Descriptions
3.7.3.1 Chip Configuration Register
Technical Data
94
1. S = CPU supervisor mode access only. User mode accesses to supervisor only addresses have no effect and result in a
2. Writing to reserved addresses has no effect; reading returns 0s.
3. Accessing an unimplemented address has no effect and causes a cycle termination transfer error.
0x00c1_0000
0x00c1_0004
0x00c1_0008
0x00c1_000c
cycle termination transfer error.
Address
Reset configuration register (RCON)
Chip configuration register (CCR)
Table 3-3. Chip Configuration Module Memory Map
Address: 0x00c1_0000 and 0x00c1_0001
Notes:
Chip test register (CTR)
Reset:
Reset:
1. Determined during reset configuration
2. 0 for all configurations except emulation mode, 1 for emulation mode
3. 0 for all configurations except emulation and master modes, 1 for emulation and master
Read:
Read:
Write:
Write:
The following subsection describes the CCM registers.
modes
Freescale Semiconductor, Inc.
Bits 31–16
For More Information On This Product,
Note 1
LOAD
Bit 15
Bit 7
0
0
Figure 3-2. Chip Configuration Register (CCR)
Chip Configuration Module (CCM)
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= Writes have no effect and the access terminates without a transfer error exception.
Note 3
SZEN
14
0
0
6
Unimplemented
PSTEN
Note 2
Note 2
SHEN
13
5
Chip identification register (CIR)
EMINT
SHINT
Note 2
(3)
12
4
0
Reserved
Reserved
Bits 15–0
BME
11
0
0
3
1
(2)
(2)
MODE2
Note 1
BMD
10
2
0
MMC2107 – Rev. 2.0
MODE1
Note 1
BMT1
9
1
0
MOTOROLA
Access
MODE0
Note 1
BMT0
S
S
S
Bit 8
Bit 0
0
(1)