MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 65

no-image

MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
MMC2107 – Rev. 2.0
MOTOROLA
Interrupt Controller (INTC)
P = Current pin state
0x00c4_0001
0x00c4_0002
0x00c4_0003
0x00c4_0004
0x00c5_0000
0x00c5_0001
0x00c5_0002
0x00c5_0003
0x00c4_ffff
Address
Interrupt Control Register
Interrupt Status Register
Reset Status Register
Register Name
Reset Test Register
U = Unaffected
Unimplemented
See page 134.
See page 135.
See page 157.
See page 159.
Reserved
Figure 2-2. Register Summary (Sheet 12 of 34)
(RSR)
(RTR)
(ICR)
(ISR)
Freescale Semiconductor, Inc.
For More Information On This Product,
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Go to: www.freescale.com
AE
0
0
0
0
1
0
0
0
0
0
0
Access results in a bus monitor timeout generating an access termination transfer error.
System Memory Map
= Writes have no effect and the access terminates without a transfer error exception.
VEC6
FVE
Writes have no effect, reads return 0s, and the access terminates
14
14
6
0
0
6
0
0
6
6
0
6
0
0
0
0
6
0
SOFT
VEC5
ME
13
13
5
5
0
0
5
5
0
5
0
0
0
0
5
0
without a transfer error exception.
MASK4
VEC4
WDR
MFI
12
12
4
4
0
0
4
4
0
4
0
0
0
4
0
Bit Number
MASK3
VEC3
POR
Reset dependent
11
11
3
3
0
0
3
3
0
0
3
0
0
0
3
0
MASK2
VEC2
EXT
10
10
2
2
0
0
2
2
0
0
2
0
0
0
2
0
System Memory Map
MASK1
VEC1
LOC
INT
Technical Data
1
1
0
0
1
1
0
0
1
0
0
1
0
9
9
Register Map
MASK0
VEC0
FINT
Bit 0
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
LOL
0
0
0
0
0
0
0
65