MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 317

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

15.7.16 Pulse Accumulator Flag Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: TIM1 — 0x00ce_0019
Reset:
Read: Anytime
Write: Anytime; writing 1 clears the flag; writing 0 has no effect
PAOVF — Pulse Accumulator Overflow Flag
PAIF — Pulse Accumulator Input Flag
When the fast flag clear all enable bit, TFFCA, is set, any access to the
pulse accumulator counter registers clears all the flags in TIMPAFLG.
Read:
Write:
Figure 15-20. Pulse Accumulator Flag Register (TIMPAFLG)
PAOVF is set when the 16-bit pulse accumulator rolls over from
$FFFF to $0000. If the PAOVI bit in TIMPACTL is also set, PAOVF
generates an interrupt request. Clear PAOVF by writing a 1 to it.
PAIF is set when the selected edge is detected at the PAI pin. In event
counter mode, the event edge sets PAIF. In gated time accumulation
mode, the trailing edge of the gate signal at the PAI pin sets PAIF. If
the PAI bit in TIMPACTL is also set, PAIF generates an interrupt
request. Clear PAIF by writing a 1 to it.
Freescale Semiconductor, Inc.
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1 = Pulse accumulator overflow
0 = No pulse accumulator overflow
1 = Active PAI input
0 = No active PAI input
TIM2 — 0x00cf_0019
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
3
0
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
2
0
0
PAOVF
1
0
Technical Data
PAIF
Bit 0
0
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