MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 250

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Ports Module
11.4.1 Memory Map
Technical Data
250
1. S/U = CPU supervisor or user mode access. User mode accesses to supervisor only addresses have no effect and result
2. Writes have no effect, reads return 0s, and the access terminates without a transfer error exception.
0x00c0_0034–
0x00c0_0000
0x00c0_0004
0x00c0_0008
0x00c0_0010
0x00c0_0014
0x00c0_0018
0x00c0_0020
0x00c0_0024
0x00c0_0028
0x00c0_0030
0x00c0_000c
0x00c0_001c
0x00c0_002c
0x00c0_003c
in a cycle termination transfer error.
Address
PORTAP/SETA
PORTEP/SETE
PORTIP/SETI
Bits 31–24
PCDPAR
PORTA
PORTE
PORTI
DDRA
DDRE
CLRA
CLRE
DDRI
CLRI
Table 11-1. I/O Port Module Memory Map
Freescale Semiconductor, Inc.
For More Information On This Product,
PORTBP/SETB
PORTFP/SETF
Bits 23–16
Go to: www.freescale.com
PORTB
PORTF
PEPAR
DDRB
DDRF
CLRB
CLRF
Ports Module
Reserved
PORTGP/SETG
PORTCP/SETC
(2)
Reserved
Reserved
Reserved
Reserved
Bits 15–8
PORTG
PORTC
DDRG
DDRC
CLRG
CLRC
(2)
(2)
(2)
(2)
Reserved
PORTDP/SETD
PORTHP/SETH
(2)
Bits 7–0
PORTD
PORTH
DDRD
DDRH
CLRD
CLRH
MMC2107 – Rev. 2.0
MOTOROLA
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
(1)