MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 326

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Timer Modules (TIM1 and TIM2)
15.9 Reset
15.10 Interrupts
15.10.1 Timer Channel Interrupts (CxF)
Technical Data
326
NOTE:
Reset initializes the timer registers to a known startup state as described
in the
Table 15-8
A channel flag is set when an input capture or output compare event
occurs. Clear a channel flag by writing a 1 to it.
When the fast flag clear all bit, TFFCA, is set, an input capture read or
an output compare write clears the corresponding channel flag. TFFCA
is in timer system control register 1 (TIMSCR1).
When a channel flag is set, it does not inhibit subsequent output
compares or input captures
Freescale Semiconductor, Inc.
For More Information On This Product,
15.7 Memory Map and
Channel 3 IC/OC
Channel 2 IC/OC
Channel 1 IC/OC
Channel 0 IC/OC
PA overflow
PA input
Timer overflow
Interrupt Request
Timer Modules (TIM1 and TIM2)
lists the interrupt requests generated by the timer.
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Table 15-8. Timer Interrupt Requests
Registers.
PAOVF
PAIF
Flag
TOF
C3F
C2F
C1F
C0F
Enable Bit
PAOVI
TOI
C3I
C2I
C1I
C0I
PAI
MMC2107 – Rev. 2.0
MOTOROLA