MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 290
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MMCCMB2107
Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet
1.MMCCMB2107.pdf
(618 pages)
Specifications of MMCCMB2107
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Programmable Interrupt Timer Modules (PIT1 and PIT2)
14.7 Functional Description
14.7.1 Set-and-Forget Timer Operation
Technical Data
290
PIT CLOCK
COUNTER
MODULUS
PIF
Figure 14-5. Counter Reloading from the Modulus Latch
0x0002
This subsection describes the PIT functional operation.
This mode of operation is selected when the RLD bit in the PCSR
register is set.
When the PIT counter reaches a count of 0x0000, the PIF flag is set in
PCSR. The value in the modulus latch is loaded into the counter, and the
counter begins decrementing toward 0x0000. If the PIE bit is set in
PCSR, the PIF flag issues an interrupt request to the CPU.
When the OVW bit is set in PCSR, the counter can be directly initialized
by writing to PMR without having to wait for the count to reach 0x0000.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
0x0001
0x0005
0x0000
MMC2107 – Rev. 2.0
0x0005
MOTOROLA