NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 188

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Functional Description
5.17.4
5.17.4.1
188
Power State Mappings
Power Management Operation
Power management of the ICH6 SATA controller and ports will cover operations of the host
controller and the SATA wire.
The D0 PCI power management state for device is supported by the ICH6 SATA controller.
SATA devices may also have multiple power states. From parallel ATA, three device states are
supported through ACPI. They are:
Each of these device states are subsets of the host controller’s D0 state.
Finally, SATA defines three PHY layer power states, that have no equivalent mappings to parallel
ATA. They are:
Since these states have much lower exit latency than the ACPI D1 and D3 states, the SATA
controller defines these states as sub-states of the device D0 state.
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Provides a text mode user interface that allows the user to manage the RAID configuration on
the system in a pre-operating system environment. Its feature set is kept simple to keep size to
a minimum, but allows the user to create & delete RAID volumes and select recovery options
when problems occur.
Provides boot support when using a RAID volume as a boot disk. It does this by providing
Int13 services when a RAID volume needs to be accessed by DOS applications (such as
NTLDR) and by exporting the RAID volumes to the System BIOS for selection in the boot
order.
At each boot up, provides the user with a status of the RAID volumes and the option to enter
the user interface by pressing CTRL-I.
D0 – Device is working and instantly available.
D1 – device enters when it receives a STANDBY IMMEDIATE command. Exit latency from
this state is in seconds
D3 – from the SATA device’s perspective, no different than a D1 state, in that it is entered via
the STANDBY IMMEDIATE command. However, an ACPI method is also called which will
reset the device and then cut its power.
PHY READY – PHY logic and PLL are both on and active
Partial – PHY logic is powered, but in a reduced state. Exit latency is no longer than 10 ns
Slumber – PHY logic is powered, but in a reduced state. Exit latency can be up to 10 ms.
Intel
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I/O Controller Hub 6 (ICH6) Family Datasheet