NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 691
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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19.1.26
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
15:6
Bit
5
4
3
2
1
0
Reserved
Transactions Pending (TDP) — RO. This bit has no meaning for the root port since only one
transaction may be pending to the Intel
returned to 0.
AUX Power Detected (APD) — RO. The root port contains AUX power for wakeup.
Unsupported Request Detected (URD) — R/WC. Indicates an unsupported request was detected.
Fatal Error Detected (FED) — R/WC. This bit indicates a fatal error was detected.
0 = Fatal has not occurred.
1 = A fatal error occurred from a data link protocol error, link training error, buffer overflow, or
Non-Fatal Error Detected (NFED) — R/WC. This bit indicates a non-fatal error was detected.
0 = Non-fatal has not occurred.
1 = A non-fatal error occurred from a poisoned TLP, unexpected completions, unsupported
Correctable Error Detected (CED) — R/WC. This bit indicates a correctable error was detected.
0 = Correctable has not occurred.
1 = The port received an internal correctable error from receiver errors / framing errors, TLP CRC
malformed TLP.
requests, completer abort, or completer timeout.
error, DLLP CRC error, replay num rollover, replay timeout.
4A–4Bh
0010h
®
ICH6, so a read of this bit cannot occur until it has already
Description
Attribute:
Size:
PCI Express* Configuration Registers
R/WC, RO
16 bits
691
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