NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 80

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
Pin States
3.2
3.3
80
Table 3-2. IDE Series Termination Resistors
10.Simulation data shows that these resistor values can range from 15 kΩ to 35 kΩ.
12.The internal pull-up is enabled only when the PCIRST# pin is driven low and the PWROK indication is high.
13.Simulation data shows that these resistor values can range from 15 kΩ to 30 kΩ.
14.Simulation data shows that these resistor values can range from 45 kΩ to 170 kΩ.
15.Simulation data shows that these resistor values can range from 10 kΩ to 20 kΩ. The internal pull-up is only
17.Simulation data shows that these resistor values can range from 14.25 kΩ to 24.8 kΩ
IDE Integrated Series Termination Resistors
Table 3-2
NOTE: Simulation data indicates that the integrated series termination resistors are a nominal 33 Ω but can
Output and I/O Signals Planes and States
as the state at various times. Within the table, the following terms are used:
“High-Z”
“High”
“Low”
“Defined”
“Undefined”
“Running”
“Off”
Note that the signal levels are the same in S4 and S5, except as noted.
11.The pull-down on this signal is only enabled when LAN_RST# is asserted.
16. Simulation data shows that these resistor values can range from 10 kΩ to 30 kΩ.
3. Simulation data shows that these resistor values can range from 10 kΩ to 20 kΩ.
4. Simulation data shows that these resistor values can range from 9 kΩ to 50 kΩ.
5. The pull-down resistors on ACZ_SYNC (AC ‘97) and ACZ_SDOUT (AC ‘97) are enabled during reset and
6. Simulation data shows that these resistor values can range from 10 kΩ to 40 kΩ.
7. The pull-down on this signal (in Intel High Definition Audio mode) is only enabled when in S3
8. Simulation data shows that these resistor values can range from 5.7 kΩ to 28.3 kΩ.
9. The pull-up or pull-down on this signal is only enabled at boot/reset for strapping function.
Table 3-3
also enabled when either:
- The LSO bit (bit 3) in the AC ’97 Global Control Register (D30:F2:2C) is set to 1, or
- Both Function 2 and Function 3 of Device 30 are disabled.
enabled only during PLTRST# assertion.
Otherwise, the integrated Pull-down resistor is disabled.
DDACK#, IORDY, DA[2:0], DCS1#,
DD[15:0], DIOW#, DIOR#, DREQ,
range from 21 Ω to 75 Ω.
shows the ICH6 IDE signals that have integrated series termination resistors.
and
DCS3#, IDEIRQ
Table 3-4
Signal
Tri-state. ICH6 not driving the signal high or low.
ICH6 is driving the signal to a logic 1
ICH6 is driving the signal to a logic 0
Driven to a level that is defined by the function (will be high or low)
ICH6 is driving the signal, but the value is indeterminate.
Clock is toggling or signal is transitioning because function not stopping
The power plane is off, so ICH6 is not driving
shows the power plane associated with the output and I/O signals, as well
Intel
Integrated Series Termination Resistor Value
®
I/O Controller Hub 6 (ICH6) Family Datasheet
approximately 33 Ω (See Note)
COLD
.

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