NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 3

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

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Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Introduction
1.2
Signal Description
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
2.20
2.21
2.22
Pin States
3.1
3.2
3.3
3.4
System Clock Domains
Functional Description
5.1
Overview............................................................................................................................. 46
Direct Media Interface (DMI) to Host Controller.................................................................. 56
PCI Express* ...................................................................................................................... 56
Link to LAN Connect ...........................................................................................................57
EEPROM Interface ............................................................................................................. 57
Firmware Hub Interface ......................................................................................................57
PCI Interface ....................................................................................................................... 58
Serial ATA Interface............................................................................................................ 60
IDE Interface ....................................................................................................................... 61
LPC Interface...................................................................................................................... 62
Interrupt Interface ............................................................................................................... 63
USB Interface ..................................................................................................................... 64
Power Management Interface............................................................................................. 65
Processor Interface............................................................................................................. 67
SMBus Interface ................................................................................................................. 68
System Management Interface........................................................................................... 68
Real Time Clock Interface ..................................................................................................69
Other Clocks ....................................................................................................................... 69
Miscellaneous Signals ........................................................................................................ 69
AC ’97/Intel
General Purpose I/O ...........................................................................................................71
Power and Ground.............................................................................................................. 73
Pin Straps ........................................................................................................................... 74
2.22.1 Functional Straps ................................................................................................... 74
2.22.2 External RTC Circuitry ........................................................................................... 76
2.22.3 Power Sequencing Requirements ......................................................................... 76
Integrated Pull-Ups and Pull-Downs ................................................................................... 79
IDE Integrated Series Termination Resistors ..................................................................... 80
Output and I/O Signals Planes and States ......................................................................... 80
Power Planes for Input Signals........................................................................................... 89
PCI-to-PCI Bridge (D30:F0) ................................................................................................ 97
5.1.1
5.1.2
.................................................................................................................................. 79
2.22.3.1 V5REF / Vcc3_3 Sequencing Requirements ......................................... 76
2.22.3.2 3.3 V/1.5 V Standby Power Sequencing Requirements ........................ 76
2.22.3.3 3.3 V/2.5 V Power Sequencing Requirements....................................... 77
2.22.3.4 Vcc1_5/V_Processor_IO Power Sequencing Requirements ................. 77
PCI Bus Interface................................................................................................... 97
PCI Bridge As an Initiator ...................................................................................... 97
5.1.2.1
............................................................................................................................. 43
®
High Definition Audio Link ............................................................................. 70
................................................................................................................. 53
Memory Reads and Writes .................................................................... 98
........................................................................................................ 97
....................................................................................................... 95
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