NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 258

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
Chipset Configuration Registers
7.1.26
7.1.27
7.1.28
258
LSTS—Link Status Register
Offset Address:
Default Value:
CSIR5—Chipset Initialization Register 5
Offset Address:
Default Value:
CSIR6—Chipset Initialization Register 6
Offset Address:
Default Value:
15:10
31:14
31:22
21:16
15:14
13:8
13:8
Bit
9:4
3:0
Bit
7:6
5:0
Bit
7:6
5:0
Reserved
Negotiated Link Width (NLW) — RO. Negotiated link width is x4 (000100b). ICH6-M may also
indicate x2 (000010b), depending on (G)MCH configuration.
Link Speed (LS) — RO. Link is 2.5 Gb/s.
Reserved
Chipset Initialization Register Bits[13:8] — R/W. BIOS programs this field to 100000b.
Reserved
Chipset Initialization Register Bits[5:0] — R/W. BIOS programs this field to 001000b.
Reserved
Chipset Initialization Register Bits[21:16] — R/W. BIOS programs this field to 000100b.
Reserved
Chipset Initialization Register Bits[13:8] — R/W. BIOS programs this field to 000010b.
Reserved
Chipset Initialization Register Bits[5:0] — R/W. BIOS programs this field to 000001b.
01AA–01ABh
0041h
0200–0203h
01100220h
020C–020Fh
00201004h
Intel
®
Description
Description
Description
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
32-bit
32-bit
16-bit
R/W
R/W

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