NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 217

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Intel
Table 5-47. I
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Note: This command is supported independent of the setting of the I2C_EN bit. The I
message. Also, the Block Write protocol sequence changes slightly: the Byte Count (bits 27:20 in
the bit sequence) are not sent - as a result, the slave will not acknowledge (bit 28 in the sequence).
I
This command allows the ICH6 to perform block reads to certain I
E
However, this does not allow access to devices using the I
bytes after the address. Typically these data bytes correspond to an offset (address) within the serial
memory chips.
with the PEC_EN bit set produces undefined results. Software must force both the PEC_EN and
AAC bit to 0 when running this command.
For I
I/O register, offset 04h) needs to be 0.
The format that is used for the command is shown in
The ICH6 will continue reading data from the peripheral until the NAK is received.
2
18:11
27:21
37:30
46:39
2
C Read
2
Bit
8:2
10
19
20
28
29
38
47
PROMs. The SMBus Block Read supports the 7-bit addressing mode only.
1
9
–
–
–
–
C Block Read
2
C Read command, the value written into bit 0 of the Transmit Slave Address Register (SMB
Start
Slave Address — 7 bits
Write
Acknowledge from slave
Send DATA1 register
Acknowledge from slave
Repeated Start
Slave Address — 7 bits
Read
Acknowledge from slave
Data byte 1 from slave — 8 bits
Acknowledge
Data byte 2 from slave — 8 bits
Acknowledge
Data bytes from slave / Acknowledge
Data byte N from slave — 8 bits
NOT Acknowledge
Stop
Description
Table
2
C “Combined Format” that has data
5-47.
2
C devices, such as serial
Functional Description
2
C Read command
217