NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 333

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

9.1.13
9.1.14
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0)
Offset Address:
Default Value:
This register defines the base and limit, aligned to a 1-MB boundary, of the non-prefetchable
memory area of the bridge. Accesses that are within the ranges specified in this register will be sent
to PCI if CMD.MSE is set. Accesses from PCI that are outside the ranges specified will be
accepted by the bridge if CMD.BME is set.
PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0)
Offset Address:
Default Value:
Defines the base and limit, aligned to a 1-MB boundary, of the prefetchable memory area of the
bridge. Accesses that are within the ranges specified in this register will be sent to PCI if
CMD.MSE is set. Accesses from PCI that are outside the ranges specified will be accepted by the
bridge if CMD.BME is set.
31-20
19-16
31-20
19-16
15:4
15:4
Bit
3:0
Bit
3:0
Prefetchable Memory Limit (PML)
incoming address to determine the upper 1-MB aligned value (exclusive) of the range. The incoming
address must be less than this value.
64-bit Indicator (I64L)
Prefetchable Memory Base (PMB)
incoming address to determine the lower 1-MB aligned value (inclusive) of the range. The incoming
address must be greater than or equal to this value.
64-bit Indicator (I64B)
Memory Limit (ML) — R/W. These bits are compared with bits 31:20 of the incoming address to
determine the upper 1-MB aligned value (exclusive) of the range. The incoming address must be
less than this value.
Reserved
Memory Base (MB) — R/W. These bits are compared with bits 31:20 of the incoming address to
determine the lower 1-MB aligned value (inclusive) of the range. The incoming address must be
greater than or equal to this value.
Reserved
20–23h
00000000h
24–27h
00010001h
—
—
RO. This field indicates support for 64-bit addressing.
RO. This field indicates support for 64-bit addressing.
—
—
R/W. These bits are compared with bits 31:20 of the
R/W. These bits are compared with bits 31:20 of the
Description
Description
Attribute:
Size:
Attribute:
Size:
PCI-to-PCI Bridge Registers (D30:F0)
R/W, RO
32 bits
R/W, RO
32-bit
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