NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 266
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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Chipset Configuration Registers
7.1.43
266
D29IP—Device 29 Interrupt Pin Register
Offset Address:
Default Value:
31:28
27:16
15:12
11:8
Bit
7:4
3:0
EHCI Pin (EIP) — R/W. This field indicates which pin the EHCI controller drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
Reserved
UHCI #3 Pin (U3P) — R/W. This field indicates which pin the UHCI controller #3 (ports 6 and 7)
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC#
4h = INTD# (Default)
5h–7h = Reserved
UHCI #2 Pin (U2P) — R/W. This field indicates which pin the UHCI controller #2 (ports 4 and 5)
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC# (Default)
4h = INTD#
5h–7h = Reserved
UHCI #1 Pin (U1P) — R/W. This field indicates which pin the UHCI controller #1 (ports 2 and 3)
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–7h = Reserved
UHCI #0 Pin (U0P) — R/W. This field indicates which pin the UHCI controller #0 (ports 0 and 1)
drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
3108–310Bh
10004321h
Intel
®
Description
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
32-bit
R/W
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