NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 423

no-image

NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
10.9
10.9.1
Intel
Table 10-12. TCO I/O Register Address Map
®
I/O Controller Hub 6 (ICH6) Family Datasheet
System Management TCO Registers (D31:F0)
The TCO logic is accessed via registers mapped to the PCI configuration space (Device
31:Function 0) and the system I/O space. For TCO PCI Configuration registers, see LPC Device
31:Function 0 PCI Configuration registers.
TCO Register I/O Map
The TCO I/O registers reside in a 32-byte range pointed to by a TCOBASE value, which is,
PMBASE + 60h in the PCI configuration space. The following table shows the mapping of the
registers within that 32-byte range. Each register is described in the following sections.
TCO_RLD—TCO Timer Reload and Current Value Register
I/O Address:
Default Value:
Lockable:
TCOBASE
15:10
0Ch–0Dh
0Ah–0Bh
00h–01h
04h–05h
06h–07h
08h–09h
12h–13h
14h–1Fh
+ Offset
Bit
9:0
0Eh
02h
03h
0Fh
10h
11h
Reserved
TCO Timer Value — R/W. Reading this register will return the current count of the TCO timer.
Writing any value to this register will reload the timer to prevent the timeout.
TCO_MESSAGE1,
TCO_MESSAGE2
TCO_DAT_OUT
SW_IRQ_GEN
TCO_WDCNT
TCO_DAT_IN
TCO1_CNT
TCO2_CNT
TCO1_STS
TCO2_STS
Mnemonic
TCO_TMR
TCO_RLD
TCOBASE +00h
0000h
No
TCO Timer Reload and Current Value
TCO Data In
TCO Data Out
TCO1 Status
TCO2 Status
TCO1 Control
TCO2 Control
TCO Message 1 and 2
Reserved
Software IRQ Generation
Reserved
TCO Timer Initial Value
Reserved
Watchdog Control
Register Name
Description
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
Power Well:
R/W
16-bit
Core
Default
0000h
0000h
0000h
0008h
0004h
0000h
00h
00h
00h
00h
11h
R/W (special),
R/W, R/WC
R/WC, RO
R/WC
Type
R/W,
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
423

Related parts for NH82801FBM S L89K